Rashmi Jha
About
Dr. Rashmi Jha is Professor in Electrical Engineering and Computer Science Department at the University of Cincinnati. She was an Associate Professor at the University of Cincinnati from 2015-2020. She worked as an Assistant Professor and then Associate Professor in Electrical Engineering and Computer Science Department at the University of Toledo from 2008 to 2015. Before this, she worked as a Process Integration Engineer for 45 nm/32 nm High-k/Metal Gates based Advanced CMOS technology at Semiconductor Research and Development Center, IBM, East Fishkill New York between 2006-2008. She finished her Ph.D. and M.S. in Electrical Engineering from North Carolina State University in 2006 and 2003, respectively, and B.Tech. in Electrical Engineering from Indian Institute of Technology (IIT) Kharagpur, India in 2000. She has more than 18 years of experience in the areas of Solid State Electronics and Nanoelectronic Device Design, Modeling, Fabrication, Process Integration, Electrical Characterization, Data Analysis, Circuit Design and Simulations. She has been granted 13 US patents and has authored/co-authored several publications in the areas of computing devices, circuits, and algorithms. She has been a recipient of AFOSR Summer Faculty Fellowship Award in 2017, CAREER Award from the National Science Foundation in 2013, IBM Faculty Award in 2012, IBM Invention Achievement Award in 2007, Materials Research Society's Graduate Student Award in 2006, Applied Materials Fellowship Award in 2005-2006, and the best student paper award nomination in IEEE International Electron Devices Meeting (IEDM) in 2005. Her current research interests span all the way from devices to systems and algorithms. Particularly, she is interested in Artificial Intelligence (AI), Low-Power Neuromorphic Systems, CMOS and other emerging logic and memory devices ( such as Resistive Random Access Memory Devices, Spintronics, and other memristive devices), On-die sensors, Cross-Technology Heterogenous Integration and Modeling, Cybersecurity with emphasis on Hardware Security, Additive, Flexible, and Wearable Electronics, Nanoelectronics, Neuroscience and Neuroelectronics, Bio-Inspired Computing and Systems.
Research Performance Summary
First Recorded Paper
Compatibility of dual metal gate electrodes with high-k dielectrics for CMOS
Year: 2003
Citations: 37
Venue: IEEE International Electron Devices Meeting 2003, 13.5. 1-13.5. 4
Latest Recorded Paper
On-Chip Integrity, Reliability, and Aging Assurance Techniques for ICs
Year: 2026
Citations: 0
Venue: Advances in Hardware Design for Security and Trust
Last 10 Years Publication Activity
This timeline shows the professor's yearly publication activity.